The Video In to AXI4-Stream core uses industry-standard control and data interfaces to connect to other system components. The following sections describe the various interfaces available with the core. This Figure illustrates an I/O diagram of the Video In to AXI4-Stream core. Not all of the timing signals are required by this core, however it also passes these signals to a Xilinx Video Timing Controller which, depending on its configuration, may require certain signals . Therefore all timing signals are present. For the Video In to AXI4-Stream core, the data valid is always required. Also, either a vertical sync or a vertical blank input is required.
