There are many tools available to address Aurora 8B/10B core design issues. It is important to know which tools are useful for debugging various situations.
Note: The init_clk_in clock input is provided as a stable and free running clock to drive the Debug cores and the stability of this clock source is key to ensure debugging is proper. Ensure that only after this clock is stable the pma_init input of the IP is deasserted. The init_clk_in must always be stable.