The Aurora 8B/10B core automatically interrupts data transmission when it sends clock compensation sequences. The clock compensation sequence imposes 12 bytes of overhead per lane every 10,000 bytes.
This Figure shows how the Aurora 8B/10B core pauses data transmission during the clock compensation sequence.
Because of the need for clock compensation every 10,000 bytes per lane (5,000 clocks for 2-byte per lane designs; 2,500 clocks for 4-byte per lane designs), you cannot continuously transmit data nor can data be continuously received. During clock compensation, data transfer is suspended for six or three clock periods.