These documents provide supplemental material useful with this product guide. You should be familiar with these documents prior to generating an Aurora 8B/10B core.
1.UltraScale Architecture GTH Transceivers User Guide (UG576)
2.7 Series FPGAs GTP Transceivers User Guide (UG482)
3.7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
4.AMBA AXI4-Stream Protocol Specification (v1.0)
5.Aurora 8B/10B Protocol Specification (SP002)
6.Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
7.Vivado Design Suite User Guide: Designing with IP (UG896)
8.Vivado Design Suite User Guide: Getting Started (UG910)
9.Vivado Design Suite User Guide - Logic Simulation (UG900)
10.Designing a System Using the Aurora 8B10B Core (Duplex) on the KC705 Evaluation Kit (XAPP1193)
11.Vivado Design Suite User Guide: Programming and Debugging (UG908)
12.UltraScale Architecture Migration Methodology Guide (UG1026)
13.LogiCORE IP Aurora 8B/10B v5.3 Data Sheet (DS637)
14.LogiCORE IP Aurora 8B/10B v5.3 User Guide (UG353)
15.Packaging Custom AXI IP for Vivado IP Integrator Application Note (XAPP1168)
16.UltraScale FPGAs Transceivers Wizard LogiCORE IP Product Guide (PG182)
17.7 Series FPGAs Data Sheet: Overview (DS180)
18.UltraScale Architecture and Product Overview (DS890)
19.Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics (DS892)
20.Virtex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics (DS893)
21.Kintex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics (DS922)
22.Virtex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics (DS923)