The Aurora 8B/10B core delivers a demonstration test bench for the example design. This chapter describes the Aurora test bench and its functionality. The test bench consist of the following modules:
•Device Under Test (DUT)
•Clock and reset generator
•Status monitor
The Aurora test bench components can change based on the selected Aurora 8B/10B core configurations, but the basic functionality remains the same for all of the core configurations.
The Aurora test bench environment connects the Aurora duplex core in loopback using a high-speed serial interface. This Figure shows the Aurora test bench for the duplex configuration.
The test bench first verifies the channel state, then monitors the integrity of the user and UFC data for a predetermined simulation time. The channel_up assertion message indicates successful link training and channel bonding (in the case of multi-lane designs). A counter is maintained in the FRAME_CHECK module to track the reception of any erroneous data. The test bench flags an error when erroneous data is received.
The Aurora test bench environment connects the Aurora simplex core to the partner simplex Aurora core using the high-speed serial interface. This Figure shows the Aurora test bench for the simplex configuration where DUT1 is configured as TX-only simplex and DUT2 is configured as RX-only simplex.
The test bench first verifies the state of the transmitter and receiver channels, then monitors the integrity of the user data for a predetermined simulation time. The tx_channel_up and rx_channel_up assertion messages indicate successful link training and channel bonding (in case of multi-lane designs).