Clock Correction - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)

Document ID
PG047
Release Date
2023-11-01
Version
16.2 English

The calculations in all previous sections assumes that the receive elastic buffers are restored to approximately half occupancy at the start of each frame. This is achieved by the elastic buffer performing clock correction during the interframe gaps either by inserting or removing Idle characters as required. The receive elastic buffer also performs clock correction on /C1/, /C2/ configuration code words received during auto-negotiation. This is similar to the way that clock correction is done on /C1/ in the transceiver elastic buffer.

  • If the receive elastic buffer is emptying during frame reception, there are no restrictions on the number of Idle characters that can be inserted due to clock correction. The occupancy will be restored to half full and the assumption holds true.
  • If the receive elastic buffer is filling during frame reception, Idle characters need to be removed. Restrictions that need to be considered are described in the following sections.