Data received by comma alignment block is in parallel form, but the bits of the parallel bus have not been aligned into correct 10-bit word boundaries. By detecting a unique 7-bit serial sequence known as a 'comma' (however the commas can fall across the 10-bit parallel words), the comma alignment logic controls bit shifting of the data so as to provide correct alignment to the data leaving the module.
The bitslip input of the gearbox_6b_10b is driven by the comma alignment module state machine, so the actual bit shift logic is performed by the gearbox_6b_10b. In 8B/10B encoding, both +ve and -ve bit sequences exist for each defined code group. The comma alignment logic is able to detect and control realignment on both +ve and -ve comma versions.
The following files describe the Comma Alignment block:
<project_dir>/<project_name>/<project_name>.srcs/sources1/ip/<component_name>/ synth/lvds_transceiver/<component_name>_sgmii_comma_alignment.v[hd]