Examine the Example Design Provided with the Core - 16.2 English

An HDL example design built around the core is provided through the AMD Vivado™ design tools that allow for a demonstration of core functionality using either a simulation package or in hardware if placed on a suitable board.

Multiple different example designs are provided depending upon the core customization:

• 1000BASE-X or 2500BASE-X with Transceiver Example Design
• SGMII/Dynamic Switching Using a Transceiver Example Design
• Synchronous SGMII over LVDS Example Design (Applicable for Non-Versal Devices)
• 1000BASE-X with TBI Example Design
• SGMII/Dynamic Switching with TBI Example Design

Before implementing the core in your application, examine the example design provided with the core to identify the steps that can be performed:

1. Edit the HDL top level of the example design file to change the clocking scheme, add or remove Input/Output Blocks (IOBs) as required, and replace the GMII IOB logic with user-specific application logic (for example, an Ethernet MAC).
2. Synthesize the entire design.
3. Implement the entire design. After implementation is complete you can also create a bitstream that can be downloaded to an AMD device.
4. Download the bitstream to a target device.