GMII Block - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)

Document ID
PG047
Release Date
2023-11-01
Version
16.2 English

The core provides a client-side GMII. This can be used as an internal interface for connection to an integrated Ethernet MAC or other custom logic. Alternatively, the core GMII can be routed to device Input/Output Blocks (IOBs) to provide an off-chip GMII.

Zynq 7000 and 7 series devices support GMII at 3.3V or lower only in certain parts and packages.

Some devices do not support 3.3V on pads. See the 7 Series FPGAs SelectIO Resources User Guide (UG471) or the UltraScale Architecture SelectIO Resources User Guide (UG571) for the respective device.