Port Descriptions - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)
Document ID
PG047
Release Date
2023-11-01
Version
16.2 English

The core pinout for 1000BASE-X, 2500BASE-X, SGMII, or 2.5G SGMII or Dynamic Switching in the core using transceivers is shown in the following figure.

Figure 1. Core Pinout with Transceiver in the Core
Note:
  1. Pins are visible only if SGMII is enabled.
  2. Pins are visible only if MDIO is enabled.
  3. Pins are visible only if Auto-Negotiation is enabled.
  4. Pins are visible only if Auto-Negotiation and MDIO are enabled.
  5. Pins are visible only when TEMAC selected as the interface ( speed_is_10_100 and speed_is_100 inputs are not applicable for 2.5 Gbps mode.).
  6. Pins are visible only when Gigabit Ethernet MAC (GEM) selected as the interface. These pins are part of the GMII interface.
  7. Pins are visible if (a) Auto-Negotiation and dynamic switching are enabled OR (b) dynamic switching and MDIO are enabled.
  8. Pins are visible only if Transceiver Debug is enabled.
  9. Direction of pins changes if shared logic is part of the core. The direction shown here is when shared logic is part of the example design.

The core pinout for 1000 BASE-X, 2500BASE-X, SGMII, or 2.5G SGMII or Dynamic Switching using the transceiver in the example design is shown in the following figure.

Figure 2. Core Pinout with Transceiver in Example Design
Note:
  1. Pins are visible only if SGMII is enabled.
  2. Pins are visible only if MDIO is enabled.
  3. Pins are visible only if Auto-Negotiation is enabled.
  4. Pins are visible only if Auto-Negotiation and MDIO are enabled.
  5. Pins are visible only when TEMAC selected as the interface ( speed_is_10_100 and speed_is_100 inputs are not applicable for 2.5 Gbps mode.).
  6. Pins are visible only when Gigabit Ethernet MAC (GEM) selected as the interface. These pins are part of the GMII interface.
  7. Pins are visible if (a) Auto-Negotiation and dynamic switching are enabled OR (b) dynamic switching and MDIO are enabled.
  8. See Table 2 for signals.

The core pinout for SGMII over LVDS is shown in the following figure.

Figure 3. Pinout for SGMII over LVDS Mode
Note:
  1. Pins are visible only if SGMII is enabled.
  2. Pins are visible only if MDIO is enabled.
  3. Pins are visible only if Auto-Negotiation is enabled.
  4. Pins are visible only if Auto-Negotiation and MDIO are enabled.
  5. Pins are visible if (a) Auto-Negotiation and dynamic switching are enabled OR (b) dynamic switching and MDIO are enabled.