Write an HDL Application - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)

Document ID
PG047
Release Date
2023-11-01
Version
16.2 English

After reviewing the example design delivered with the core, write an HDL application that uses single or multiple instances of the block level module for the core. Client-side interfaces and operation of the core are described in Using the Client-Side GMII Datapath. See the following information for additional details: using the core in conjunction with the TEMAC core in Interfacing to Other Cores.