If the optional management interface is
omitted from the core, all of the relevant configuration signals are brought out of the
core. These signals are bundled into the rx_configuration_vector and the tx_configuration_vector signals. The bit mapping of these signals is defined in Table 1 and Table 2.
You can permanently set the vector bits to logic 0 or 1 or change the configuration vector signals at any time. However, with the exception of the reset signals, they do not take effect until the current frame has completed transmission or reception.