The MAC sublayer provided by this core is part of the Ethernet architecture displayed in Figure 1. The portion of the architecture, from the MAC to the right, is defined in IEEE 802.3-2008 specification for non-2.5 Gbps data rates. The architecture is similar when the MAC data rate is set to 2.5 Gbps. The only notable difference for 2.5 Gbps is the interface between MAC and PHY is Internal only (GMII with no I/Os). This figure also illustrates where the supported interfaces fit into the architecture.
Figure 1. Typical Ethernet Architecture
