Flow Control Implementation Example - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

Document ID
PG051
Release Date
2023-11-07
Version
9.0 English

This explanation is intended to describe a simple (but crude) example of a Flow Control implementation to introduce the concept. Consider the system shown in Figure 1. To summarize the example, the MAC on the left-hand side of the figure cannot match the full line rate of the right-hand MAC due to clock tolerances. Over time, the FIFO illustrated fills and overflows. The aim is to implement a Flow Control method, which over a long time period, reduces the full line rate of the right-hand MAC to average that of the lesser full line rate capability of the left-hand MAC.