Interrupt Signals - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

Document ID
PG051
Release Date
2023-11-07
Version
9.0 English

The following table describes the interrupt signals provided by the TEMAC core.

Table 1. Interrupt Signals
Signal Direction Clock Domain Description
mac_irq Out s_axi_aclk Only available when the core is generated with AXI4-Lite Management Interface. This is the interrupt output from the interrupt controller. It is asserted when any of the interrupts, namely mdio_ready, interrupt_ptp_rx, interrupt_ptp_tx, or interrupt_ptp_timer has been enabled and set. See Interrupt Controller for more information.
interrupt_ptp_rx Out s_axi_aclk Only available when the core is generated with AVB. This is asserted following the reception of any PTP packet by the RX PTP Packet Buffers. See RX PTP Packet Buffer for more information.
interrupt_ptp_tx Out s_axi_aclk Only available when the core is generated with AVB. This is asserted following the transmission of any PTP packet from the TX PTP Packet Buffers. See TX PTP Packet Buffer for more information.
interrupt_ptp_timer Out s_axi_aclk Only available when the core is generated with AVB. This interrupt asserts every 1/128 seconds as measured by the RTC. This acts as a timer for the PTP software algorithms. See Real-Time Clock for more information.