Pattern Checker - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

Document ID
PG051
Release Date
2023-11-07
Version
9.0 English

The axi_pat_check_2g5 module provides a simple sanity check that data is being received correctly. It uses the same parameters as the axi_pat_gen_2g5 module and therefore expects the same frame contents and frame size increments. Because the Frame data can or cannot have the DA and SA swapped the pattern checker allows either value to be in either location.

When enabled, using a dedicated input which uses a board DIP switch, the output from the RX_FIFO is monitored. The first step is to identify where in the frame sequence the data is, this is done by capturing the first received frame first payload byte. After this is completed, the following payload bytes are expected to be incrementally bigger (unless you happen to be at the wrap point).

If an error is detected, an error is raised on the byte or bytes which mismatch and the error condition is latched and output to a dedicated output, this is displayed using a board LED.

The pattern checker state machine then re-synchronizes to the data. A dedicated input, connected to one of the push buttons, is used to clear this latched error state, enabling a feel for the frequency of errors (if any).

The pattern checker also provides a simple activity monitor. This toggles a dedicated output, which flashes a board LED, to indicate that RX Data is being received correctly. This ensures that the lack of a detected error is not due to all frames being dropped.