RTC Increment Value Control Register - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

Document ID
PG051
Release Date
2023-11-07
Version
9.0 English

The following table describes the RTC Increment Value Control Register, which provides a configurable increment rate for the RTC counter. This increment register should take the value of the clock period being used to increment the RTC. However, the resolution of this increment register is very fine (in units of 1/1048576 (1/220) fraction of one nanosecond). Therefore, the RTC increment rate can be adjusted to a very fine degree of accuracy, thus providing the following features:

  • The RTC can be incremented from any available clock frequency that is greater than the IEEE802.1AS defined minimum of 25 MHz.
  • When acting as a clock slave, the rate adjustment of the RTC can be matched to that of the network clock master to an exceptional level of accuracy.
Table 1. RTC Increment Value Control Register (0x12810)
Bits Default Value Type Description
31:26 0 RO Reserved
25:0 0 R/W Per gtx_clk clock period Increment Value for the RTC.