RTC Interrupt Clear Register - 9.0 English

Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051)

Document ID
PG051
Release Date
2023-11-07
Version
9.0 English

The following table describes the control register defined for the interrupt_ptp_timer signal, the periodic interrupt signal that the RTC raises.

Table 1. RTC Interrupt Clear Register (0x12820)
Bits Default Value Type Description
31:1 0 RO Reserved
0 0 WO Write ANY value to Bit[0] of this register to clear the interrupt_ptp_timer Interrupt signal. This bit always returns 0 on read.