A significant component of the PTP network wide timing synchronization mechanism is the Real-Time Clock (RTC), which provides the common time of the network. Every device on the network maintains its own local version.
The RTC is effectively a large counter which consists of a 32-bit nanoseconds field (the unit of this field is one nanosecond and this field counts the duration of exactly one second, then resets back to zero), and a 48-bit seconds field (the unit of this field is one second, and this field increments when the nanosecond field saturates at one second). The second field only wraps around when its count fully saturates. The entire RTC is therefore designed never to wrap around in this lifetime. The RTC is summarized in the following figure.
Conceptually, the RTC is not related to the frequency of the clock used to increment it. The RTC Increment Value Control Register is a configuration register within the core that provides a configurable increment rate for the RTC counter. It is programmed with the value of the RTC reference clock period which is being used to increment the RTC. The resolution of this increment register is very fine (in units of 1/1,048,576 (1/220) fraction of one nanosecond). Therefore, the RTC increment rate can be adjusted to a very fine degree of accuracy which provides the following features:
- The RTC can be incremented from any available clock
frequency that is greater than the AVB standards defined minimum of 25 MHz. However, the
faster the frequency of the clock, the smaller the step increment, and the smoother the
overall RTC increment rate. Note: AMD recommends clocking the RTC logic at 125 MHz because this is a readily available clock source. This frequency significantly exceeds the minimum performance of the IEEE 802.1AS specification.
- When acting as a clock slave, the rate adjustment of the RTC can be matched to that of the network clock master to an exceptional level of accuracy (by slightly increasing or decreasing the value within the RTC Increment Value Control Register). The software drivers (available separately) periodically calculate the increment rate error between themselves and the master, and update the RTC increment value accordingly.
The core also contains configuration registers, RTC Seconds Field Offset Control and RTC Nanoseconds Field Offset Control, which allow a large step change to be made to the RTC. This can be used to initialize the RTC, after power-up. It is also used to make periodic corrections, as required, by the software drivers when operating as a clock slave. However, if the increment rates are closely matched, these periodic step corrections are small.