This chapter defines the constraint requirements of the TEMAC solution. The TEMAC solution is provided with core level XDC files. These provide the constraints for the core which are expected to be applied in all instantiations of the core. These XDC files, named <compname>.xdc and <compname>_clocks.xdc , can be found in the IP Sources tab of the Sources window in the Synthesis file group.
An example XDC is also provided with the HDL example design to provide the board level constraints. This is specific to the example design and, as such, is only expected to be used as a template for the user design. See Example Design.
This XDC file, named <component name>_example_design.xdc , is found in the IP Sources tab of the Sources window in the Examples file group, in the IP example design project for the core.
The core level XDC file inherits some constraints from the example design XDC file. In any system, it is expected that you would also provide an XDC file to constrain the logic in which the TEMAC solution is instantiated.
Another example design file, <component name>_user_phytiming.xdc , is also provided to show how to override default XDC settings provided by the core for setup and hold checks on the selected physical interface.
This is useful in case the interface timing constraints cannot be met. The constraints can be relaxed by adjusting the values in this XDC file which is set to be processed after all other XDC files. This also allows the IODELAY tap delay setting to be adjusted without needing to modify the XDC files provided with the core.