Management Clock Domain - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

Document ID
PG056
Release Date
2022-11-16
Version
8.11 English

When the generic management interface is selected:

create_clock -name aux_clk -period 8.000 [get_ports aux_clk]

When the AXI4-Lite management interface is selected:

create_clock -name aux_clk -period 8.000 [get_ports s_axi_aclk]

The example design constrains the management clock to 125 MHz.