IMPORTANT: In UltraScale+, UltraScale, and 7 series architectures, resource sharing can be used to share GT resources. This is not possible when using Versal ACAP architectures.
When the CPRI core is generated with the core support layer option enabled, some components of the design are implemented in the top-level support layer. It is possible to share these components between two or more instances of the CPRI core.
This Figure shows an example where two CPRI cores are configured to share the Transmitter clock and transceiver common block. One instance of the CPRI core (cpri_0) is generated with the core support layer and the other (cpri_1) without. The clocking resources in the core support layer of cpri_0 are used to clock cpri_1.