Bits |
Description |
---|---|
31:7 |
Reserved |
6:0 |
Current position of the transceiver receive barrel shifter. See R21 Calculation for more details. |
This register is not used for Versal ACAP. The transceiver barrel shift value should be read directly from the Versal GT Quad through an AXI interface.
In UltraScale and 7 series-based cores operating at 8b10b line rates, the current transceiver barrel shift position is reported using this register.