AXI MMU Parameters - 2.1 English

AXI Interconnect LogiCORE IP Product Guide (PG059)

Document ID
PG059
Release Date
2022-05-17
Version
2.1 English
Table 3-16:      AXI MMU Parameters

Parameter Name

Default Value

Format/Range

Description

NUM_RANGES

1

Integer [0…256]

Number of Address Ranges

SI_ADDR_WIDTH

32

Integer [1…64]

Width of SI-side addr signals

MI_ADDR_WIDTH

32

Integer [SI_ADDR_WIDTH…64]

Width of MI-side addr signals

Dddd_BASE_ADDR(1)

ddd * 0x10000

Bit64

Base address of each address

range ddd (where 000 <= ddd <= NUM_RANGES-1)

Dddd_ADDR_WIDTH(1)

16

Integer [0…SI_ADDR_WIDTH]

Base address of each address

range ddd (where 000 <= ddd <= NUM_RANGES-1)

Dddd_READ_WRITE_MODE

READ_WRITE

String [READ_WRITE, READ_ONLY, WRITE_ONLY]

Enables read and/or write access to the target of each range

Notes:

1.The size of all address ranges must be a power of 2, as determined by 2**Dddd_ADDR_WIDTH. The Dddd_BASE_ADDR of all ranges must be aligned to (integer multiple of) its size. There must be no overlap among all address ranges. Unused (null) address range can be designated by setting Dddd_ADDR_WIDTH = 0 (Dddd_BASE_ADDR is then ignored). If NUM_RANGES = 0, all address ranges are ignored.