AXI Register Slice - 2.1 English

AXI Interconnect LogiCORE IP Product Guide (PG059)

Document ID
PG059
Release Date
2022-05-17
Version
2.1 English

Common Configuration:

ID Width: 4 (AXI4 and AXI3 only)

Address Width: 32

User Width: 0

Read/Write

Type: Fully-registered or Light-weigh

Protocol: AXI4, AXI3 or AXI4-Lite

Note:   The specifications in these tables are derived by implementing the configured IP in isolation, characterizing clock frequency based on static timing results, and then applying a 10% guardband below the highest constrained clock frequency that meets timing.

Table 2-15:      AXI Register Slice Performance

Performance (MHz)

Virtex-7 and Kintex-7 (and its Zynq-7000 derivatives), Speed Grade -2

Kintex UltraScale, Speed Grade -2

Artix-7 (and its Zynq-7000 derivatives), Speed Grade -2

350

400

350