Definitions, Acronyms, and Abbreviations - 2.1 English

AXI Interconnect LogiCORE IP Product Guide (PG059)

Document ID
PG059
Release Date
2022-05-17
Version
2.1 English

Table: Definitions, Acronyms, and Abbreviations provides a list of acronyms, abbreviations, and specific definitions used in this document.

Table C-1:      Definitions, Acronyms, and Abbreviations

Item

Description

AXI

The generic term for all implemented AXI protocol interfaces.

master device or connected master

An IP core or device (or one of multiple interfaces on an IP core) that generates AXI transactions out from the IP core onto the wires connecting to a slave device.

slave device or connected slave

An IP core or device (or one of multiple interfaces on an IP core) that receives and responds to AXI transactions coming in to the IP core from the wires connecting to a master device.

master interface (generic)

An interface of an IP core or module that generates out-bound AXI transactions and thus is the initiator (source) of an AXI transfer. On AXI master interfaces, AWVALID, ARVALID, and WVALID are outputs, and RVALID and BVALID are inputs.

slave interface (generic)

An interface of an IP core or module that receives in-bound AXI transactions and becomes the target (destination) of an AXI transfer. On AXI slave interfaces, AWVALID, ARVALID, and WVALID are inputs, and RVALID and BVALID are outputs.

SI slot

Slave Interface Slot: A slice of the Slave Interface vector signals of the AXI Interconnect core that connect to a single master device.

MI slot

Master Interface Slot: A slice of the Master Interface vector signals of the AXI Interconnect core that connect to a single slave device.

SI-side

A module interface closer to the SI side of the AXI Interconnect core.

MI-side

A module interface closer to the MI side of the AXI Interconnect core.

Crossbar

Module at the center of the AXI Interconnect core that routes address, data and response channel transfers between various SI slots and MI slots.

SI hemisphere

Conversion and storage modules of the AXI Interconnect core located between on the SI side of the crossbar.

MI hemisphere

Conversion and storage modules of the AXI Interconnect core located on the MI side of the crossbar.

upsizer

Data width conversion function in which the datapath width gets wider when moving in the direction from the SI-side toward the MI-side (regardless of write/read direction).

downsizer

Data width conversion function in which the datapath width gets narrower when moving in the direction from the SI-side toward the MI-side (regardless of write/read direction).