Enable Register Slice - 2.1 English

AXI Interconnect LogiCORE IP Product Guide (PG059)

Document ID
PG059
Release Date
2022-05-17
Version
2.1 English

Description: Controls AXI register slice insertion on MI.

°If None (0) is selected, no register slice is inserted.

°If Outer (1) is selected, a register slice is inserted at the MI side of the MI coupler cells hierarchy.

°If Auto (2) is selected, a register slice is automatically inserted in the MI coupler cells hierarchy if MI coupler cells with common timing paths are detected.

°If Outer and Auto (3) is selected, a register slice is inserted at the MI side of the MI coupler cells hierarchy and an additional register slice might be inserted if MI coupler cells with common timing paths are detected.

For AXI4-Lite protocol, use LIGHT_WEIGHT for all channels. For other protocols, use FULLY_REGISTERED on W and R channels and use LIGHT_WEIGHT on AW, AR and B channels.