The error conditions detected in the AXI Crossbar core follow.
•Address decode error: No eligible MI slot mapped to the address of the transaction, according to the connectivity map and applicable Write-only/Read-only parameters.
• An MI slot with the SECURE parameter enabled is targeted by a transaction in which awprot[1] or arprot[1] is set (unsecure).
If either of the preceding error conditions are detected, the AXI Crossbar core generates a protocol-compliant DECERR response to the connected master, and does not propagate the transaction to any MI slot.
The AXI Crossbar core does not detect the following error conditions.
•The response ID received on an MI slot does not map to any SI slot. This is indicative of a slave malfunction or system connectivity error that violates AXI protocol. The AXI Crossbar core does not assert the ready signal on the MI slot. The entire response (Write response or Read data burst) is permanently blocked by the AXI Crossbar core. This can cause the problematic slave device and any master device expecting to receive the response to hang.
•The AXI Crossbar core does not trap AXI4 protocol violations, which are the responsibility of the endpoint IP.
•The AXI Crossbar core neither supports nor traps Write data interleaving (all Write data is routed according to write transaction order; any wid sampled at the SI is not used for data transfer routing).
•The AXI Crossbar core does not trap narrow burst violations. This occurs when a slave device is configured with its narrow burst support logic disabled and it receives a transaction where there is a length > 1 data beat and the data transfer size is less than its physical data width. Narrow burst support should only be disabled when you are sure that all connected masters do not produce narrow bursts.
•The tools generally enforce design rules that prevent erroneous configurations at compile time. Therefore, no error detection is provided by the AXI Crossbar core for these configuration errors:
°Parameter value range violations
°Address or ID range overlap, non-binary size or base value misalignment.