Enable Protocol Checkers and mark interfaces for debug:
When checked, AXI Protocol Checker IP cores are instantiated inside the AXI Interconnect core and connected to each enabled AXI Master and AXI Slave interface. Each AXI Interconnect core AXI interface is also marked for debug.
•Maximum number of idle cycles for READY monitoring: Specifies the maximum number of idle cycles for READY monitoring in all of the enabled protocol checkers.
•Maximum READ Transactions per ID: Specifies the maximum number of outstanding READ transactions per ID in all of the enabled protocol checkers.
•Maximum Write Transactions per ID: Specifies the maximum number of outstanding WRITE transactions per ID in all of the enabled protocol checkers.