Introduction - 2.1 English

AXI Interconnect LogiCORE IP Product Guide (PG059)

Document ID
PG059
Release Date
2022-05-17
Version
2.1 English

The Xilinx® LogiCORE™ IP AXI Interconnect core connects one or more AXI memory-mapped master devices to one or more memory-mapped slave devices.

Note:   The AXI Interconnect core is intended for memory-mapped transfers only. For AXI4-Stream transfers, see the AXI4-Stream Infrastructure IP Suite LogiCORE IP Product Guide (PG085) [Ref 1].