The AXI Interconnect core can only be added to a Vivado® IP integrator block design in the Vivado Design Suite. The Interconnect IP core represents a hierarchical design block containing multiple LogiCORE™ IP instances (infrastructure cores) that become configured and connected during your system design session. Each of the infrastructure cores can also be added directly to a block design (outside of the AXI Interconnect core) or selected directly from the Vivado IP Catalog and configured for use in an HDL design.
The AXI Interconnect core allows any mixture of AXI master and slave devices to be connected to it, which can vary from one another in terms of data width, clock domain and AXI sub-protocol (AXI4, AXI3, or AXI4-Lite). When the interface characteristics of any connected master or slave device differ from those of the crossbar switch inside the interconnect, the appropriate infrastructure cores are automatically inferred and connected within the interconnect to perform the necessary conversions.