Auto Primitive - 6.0 English

Clocking Wizard LogiCORE IP Product Guide (PG065)

Document ID

PG065

Release Date

2022-04-20

Version

6.0 English

This feature helps to instantiate the clocking primitive which best fits your requirements, with high performance and better clock routing, while keeping the use of clocking resources to a minimum. All clocking features and optional ports are deselected when you select the primitive as Auto . You need to exclusively enable the options which are required. The following tables explain the selection criteria depending on the clocking features selected.

Note: This feature is available for UltraScale™ and UltraScale+™ devices only.

Table 3-1: Auto Primitives
Feature	BUFGCE_DIV	PLL	MMCM	Selection Criteria	Inferred Primitive
Phase Alignment	X	X	ü		MMCM
Spread Spectrum	X	X	ü		MMCM
Dynamic Phase Shift	X	X	ü		MMCM
Secondary Input Clock	X	X	ü		MMCM
Input_clk_stopped	X	X	ü		MMCM
Clock fb stopped	X	X	ü		MMCM
More than four output clocks	X	X	ü		MMCM
Use CDDC	X	X	ü		MMCM
Dynamic Reconfig	X	ü	ü	If number of output clocks > 2	MMCM
Dynamic Reconfig	X	ü	ü	If number of output clocks ≤ 2	PLL
Safe Clock Startup	X	ü	ü	If number of output clocks > 2	MMCM
Safe Clock Startup	X	ü	ü	If number of output clocks ≤ 2	PLL
Out_freq >In_freq	X	ü	ü	If number of output clocks > 2	MMCM
Out_freq >In_freq	X	ü	ü	If number of output clocks ≤ 2	PLL
Reset	X	ü	ü	If number of output clocks > 4	MMCM
Reset	X	ü	ü	If number of output clocks ≤ 4 The clocks must satisfy condition 2 and 3.	PLL
Non zero Phase Shift	X	ü	ü	If number of output clocks > 2	MMCM
Non zero Phase Shift	X	ü	ü	If number of output clocks ≤ 2	PLL
Locked	X	ü	ü	If number of output clocks > 4	MMCM
Locked	X	ü	ü	If number of output clocks ≤ 4 The clocks must satisfy condition 2 and 3.	PLL
Power_down	X	ü	ü	If number of output clocks > 4	MMCM
Power_down	X	ü	ü	If number of output clocks ≤ 4 The clocks must satisfy condition 2 and 3.	PLL
Output Buffer selection	ü	ü	ü	If all output clocks satisfy the conditions 1 and 2	BUFGCE_DIV (Supports a maximum of four clocks)
				Else if clocks satisfy condition 2 and 3	PLL
				Else	MMCM