Configuring Input Clocks - 6.0 English

Clocking Wizard LogiCORE IP Product Guide (PG065)

Document ID
PG065
Release Date
2022-04-20
Version
6.0 English

If Auto is selected under Primitive , all the above options would be unselected except Frequency Synthesis . There are two input clocks available, and depending on the selection, the reference clock can be switched from one to another. The IDE provides the option to select the secondary input clock to enable the additional input clock. If Spread Spectrum feature is selected, secondary input clock is disabled in the Clocking Wizard. Depending on the frequency of the secondary input clock, this can cause a less ideal network to be created than might be possible if just the primary input clock was present (more output jitter, higher power, etc.).

Valid input frequency ranges are:

Frequency when SS is unselected: 10 – 1066 MHz

Frequency when SS is selected:      25 – 150 MHz

Note: These input frequency ranges vary with the device selected.

Enter the frequency and peak-to-peak period (cycle) jitter for the input clocks. The Wizard then uses this information to create the clocking network. Additionally, a Xilinx design constraints (XDC) file is created using the values entered. For the best calculated clocking parameters, it is best to fully specify the values. For example, for a clock requirement of 33 1/3 MHz, enter 33.333 MHz rather than 33 MHz.

You can select the buffer type that drives the input clock, and this is then instantiated in the provided source code. If the input buffers are located externally, selecting No buffer leaves the connection blank. If Phase Alignment is selected, you do not have access to pins that are not dedicated clock pins, because the skew introduced by a non-clock pin is not matched by the primitive. You can choose the units for input clock jitter by selecting either the UI or PS drop-down menu. The input jitter box accepts the values based on this selection.

In IP integrator, when the Clocking Wizard IP is selected to target a board part, the frequency values that are generated to the primary and secondary clocks are displayed in a floating number format. For example, if the primary clock frequency is 100 MHz, it is displayed as 100.000 instead of 100.