This Figure shows the hardware testing setup for the AXI Chip2Chip core.
The AXI Chip2Chip core with a SelectIO™ FPGA interface has been hardware validated on a KC705 board using a Kintex®–7 FPGA with –1 speed grade (325T). The setup uses two additional FMC loopback cards. Table: Hardware Testing Configuration with a SelectIO FPGA interface provides configuration details for the AXI Chip2Chip core and the frequency achieved by utilizing this setup with the SelectIO ™ interface.
In addition, XAPP1160 provides a setup demonstrating real-time video traffic across Kintex ® -7 FPGA boards (KC705) and Zynq ® -7000 devices [Ref 1] . This setup uses the AXI Chip2Chip core for connectivity across the FPGA using LPC/HPC connector cables.
The AXI Chip2Chip Aurora Reference Design for Real-Time Video Applications (XAPP1216) demonstrates real-time video traffic between two Kintex ® –7 FPGA KC705 evaluation boards or one KC705 board and one Zynq®-7000 ZC706 evaluation board [Ref 10] . The AXI Chip2Chip core provides connectivity between the two boards using SMA data connector cables.