Overview - 5.0 English

AXI Chip2Chip LogiCORE IP Product Guide (PG067)

Document ID
PG067
Release Date
2022-05-11
Version
5.0 English

This Figure shows the configuration of the example design with a SelectIO™ interface. For an Aurora interface, connect the streaming interface of the AXI Chip2Chip core to the Aurora core, as shown in This Figure .

Figure 5-1: Example Design Block Diagram

X-Ref Target - Figure 5-1

ex_design.jpg
Figure 5-2: Example Design Block Diagram with Aurora Interface

X-Ref Target - Figure 5-2

ex_design_aurora.jpg

The example design contains the following:

An instance of the AXI Chip2Chip core

Clocking wizard to generate clock signals for the example design

Traffic generator for AXI4 and AXI4-Lite interfaces

Traffic checker for AXI4 and AXI4-Lite interfaces

an instance of the Aurora 64B66B core in duplex configuration.

IMPORTANT: Be sure to select the right device when simulating, synthesizing, and implementing the example design of the AXI Chip2Chip with PHY type set as Aurora.