During the board power-on sequence, both the
pma_init
and
reset_pb
signals are expected to be High.
INIT_CLK
and
GT_REFCLK
are expected to be stable during
power-on for the proper functioning of the Aurora 64B/66B core. When both clocks are stable,
pma_init
is deasserted followed by the deassertion of
reset_pb
.