Good clocking is critical for the correct operation of the Aurora 64B/66B core. The core requires a low-jitter reference clock to drive the high-speed TX clock and clock recovery circuits in the GTX, GTH or GTY transceiver. The core also requires at least one frequency-locked parallel clock for synchronous operation with the user application.
Each Aurora 64B/66B core is generated in the example_project directory which includes a design called aurora_example . This design instantiates the generated core and demonstrates a working clock configuration for the core. First-time users should examine the Aurora 64B/66B example design for use as a template when connecting the clock interface.