Example C: Receiving a Single-Cycle UFC Message - 12.0 English

PG074 Aurora 64B/66B LogiCORE IP Product Guide

Document ID
PG074
Release Date
2022-10-19
Version
12.0 English

This Figure shows an Aurora 64B/66B core with an 8-byte data interface receiving a 4-byte UFC message. The core presents this data to the application by asserting m_axi_ufc_rx_tvalid and m_axi_ufc_rx_tlast indicating a single-cycle frame. The m_axi_ufc_rx_tkeep bus is set to 0xF , indicating only the four most significant interface bytes are valid (each bit in TKEEP indicates a valid byte in the UFC data).

Figure 2-24: Receiving a Single-Cycle UFC Message

X-Ref Target - Figure 2-24

pg074_single_cycle_rx_ufc_message_X14635.jpg