This option is available only in UltraScale and UltraScale+ devices. When enabled, it generates the Aurora core without the GT and moves the transceiver from the core to the support level in example design. Table: List of Ports Used to Interact with GT Transceiver provides the list of ports used to interact with the GT transceiver, outside the Aurora IP.
|
Name |
Direction |
Clock Domain |
Description |
|---|---|---|---|
|
rxusrclk_in |
Input |
- |
|
|
gt<i>_txoutclk_in (2) |
Input |
- |
Connects to TXOUTCLK on transceiver channel primitives (3) |
|
gttx_fsm_resetdone_in |
Input |
user_clk |
Active-High indication to Aurora that the transmitter reset sequence of transceiver primitives as initiated by the reset controller helper block has completed. |
|
gtrx_fsm_resetdone_in |
Input |
rxusrclk_in |
Active-High indication to Aurora that the receiver reset sequence of transceiver primitives as initiated by the reset controller helper block has completed. |
|
fabric_pcs_reset_in |
Input |
user_clk |
Active-High indication to Aurora that the fabric logic must be kept in reset. |
|
userclk_rx_active_in |
Input |
rxusrclk_in |
|
|
rxdata_lane<i>_in (1) |
Input |
rxusrclk_in |
Data beats received from the GT |
|
rxheader_lane<i>_in (1) |
Input |
rxusrclk_in |
Indicates whether data or control beat is received |
|
rxdatavalid_lane<i>_in (1) |
Input |
rxusrclk_in |
Status output from GT which indicates data received on RXDATA bus is valid |
|
rxheadervalid_lane<i>_in (1) |
Input |
rxusrclk_in |
Indicates that the RXHEADER is valid when using the gearbox |
|
rxfsm_reset_out |
Output |
init_clk |
Active-High sent to reset GT RX datapath |
|
rxpolarity_out |
Output |
user_clk |
Active-High if Aurora detects polarity reversal in incoming rxdata |
|
rxgearboxslip_lane<i>_out (1) |
Output |
rxusrclk_in |
When High, this port causes the gearbox contents to slip to the next possible alignment. This port is used to achieve alignment with the interconnect logic. Asserting this port for one RXUSRCLK2 cycle changes the data alignment coming out of the gearbox. (3) |
|
txheader_lane<i>_out (1) |
Output |
user_clk |
Indicates whether data or control beat is transmitted to GT |
|
txuserdata_lane<i>_out (1) |
Output |
user_clk |
Connected to user interface in US GT Wizard for data to be transmitted by transceiver channels |
|
txsequence_lane<i>_out (4) |
Output |
user_clk |
This port is used by US GT Wizard for the interconnect logic sequence counter when the TX gearbox is used |
|
Notes: 1. lane<i> is added for a multilane design where i = 1 to N-1 where N is the number of lanes chosen. 2. i= 1 to N where N is the number of lanes chosen. 3. Refer to the UltraScale Architecture GTH Transceivers User Guide (UG576) [Ref 5] or UltraScale Architecture GTY Transceivers User Guide (UG578) [Ref 6] , when applicable. 4. lane<i> is available with similar connotation as Note 1, but only for GTY based configurations. Do not try to reconfigure a GT that is not generated by this IP core. |
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