You can preview the shared logic files when you select Shared Logic in Example Design . You can see this option in IP Sources tab in the Vivado Project Manager along with Synthesis, Simulation filesets, a new fileset for Shared Logic Files . These are read only files which can be optionally copied in to the project if you want to use them as part of the project. You can use these files directly instead of taking the additional step of opening example design and then using these additional files. In the IP sources tab, you can right click the Aurora IP which was configured as Shared Logic in Example Design , and then select the Copy Shared Logic into Project… option to copy these files in to the project hierarchy view.
CAUTION! You are cautioned that these shared logic files are read only and when copying them into project view, an additional copy of the same is generated and the ownership is transferred to the project. While using these files, make sure to follow all the sharing guidelines as per the transceiver type.
X-Ref Target - Figure 4-9
Note: Copying shared files in to the project is only for Shared Logic in Example Design .