Product Specification - 12.0 English

Aurora 64B/66B LogiCORE IP Product Guide (PG074)

Document ID
Release Date
12.0 English

The following figure shows a block diagram of the Aurora 64B/66B core.

Figure 2-1: Aurora 64B/66B Core Block Diagram

Page-1 Sheet.2 Global Logic (Channel Maintenance) Global Logic (Channel Maintenance) Standard Arrow.483 Sheet.4 Control Interface Control Interface Sheet.5 X13012 X13012 Sheet.6 Lane Logic Lane Logic Sheet.7 GTX/GTH/GTY 1 (Lane 1) GTX/GTH/GTY 1 (Lane 1) Standard Arrow.7 Standard Arrow.8 Sheet.10 Standard Arrow.10 Sheet.12 Serial I/O Lane 1 Serial I/O Lane 1 Sheet.13 RX User Interface (Framing or Streaming) RX User Interface (Framing or Streaming) Standard Arrow.13 Sheet.15 Lane Logic Lane Logic Sheet.16 GTX/GTH/GTY 2 (Lane 2) GTX/GTH/GTY 2 (Lane 2) Standard Arrow.16 Standard Arrow.17 Standard Arrow.18 Sheet.20 Serial I/O Lane 2 Serial I/O Lane 2 Sheet.21 TX User Interface (Framing or Streaming) TX User Interface (Framing or Streaming) Sheet.22 Lane Logic Lane Logic Sheet.23 GTX/GTH/GTY n (Lane n) GTX/GTH/GTY n (Lane n) Standard Arrow.25 Standard Arrow.26 Sheet.26 Serial I/O Lane n Serial I/O Lane n Standard Arrow.24 Standard Arrow.21 Sheet.29 Sheet.30 Sheet.31 Standard Arrow.31 Connector Dot.387 Connector Dot.33 Connector Dot.34 Standard Arrow.35 Connector Dot.36 Sheet.38 RX Data RX Data Sheet.39 TX Data TX Data Connector Dot.39 Connector Dot.40 Connector Dot.41 Connector Dot.42 Connector Dot.43 Connector Dot.44 Connector Dot.45 Connector Dot.46 Connector Dot.47 Connector Dot.48 Sheet.50 Standard Arrow.50 Sheet.52 Aurora Channel Serial I/O Aurora Channel Serial I/O Sheet.53 Sheet.54

The major functional modules of the Aurora 64B/66B core are:

Lane logic: An instance of the lane logic module drives each GT transceiver. This lane logic initializes each individual transceiver, handles the encoding and decoding of control characters, and performs error detection.

Global logic: The global logic module in the core performs the channel bonding for channel initialization. During operation, the channel keeps track of the Not Ready idle characters defined by the Aurora 64B/66B protocol and monitors all the lane logic modules for errors.

RX user interface: The AXI4-Stream receive (RX) user interface moves data from the channel to the application and also performs flow control functions.

TX user interface: The AXI4-Stream transmit (TX) user interface moves data from the application to the channel and also performs flow control TX functions. The standard clock compensation module is embedded inside the core. This module controls the periodic transmission of the clock compensation (CC) character.