Simulate the Core - 12.0 English

PG074 Aurora 64B/66B LogiCORE IP Product Guide

Document ID
PG074
Release Date
2022-10-19
Version
12.0 English

1. Run simulation from the Vivado IDE. Select simulation type to launch.

2. QuestaSim launches and compiles the modules.

3. The wave_mti.do file loads automatically and populates AXI4-Stream signals.

4. Allow the simulation to run. This might take some time.

a. Initially lane up is asserted.

b. Channel up is then asserted and the data transfer begins.

c. Data transfer from all flow control interfaces now begins.

d. Frame checker continuously checks the received data and reports for any data mismatch.

5. A 'TEST PASS' or 'TEST FAIL' status is printed on the QuestaSim console providing the status of the test.