The Aurora 64B/66B core uses four BUFGs as shown in Figure 1 for a given core configuration using GTX or GTH transceivers. Aurora 64B/66B is an eight-byte-aligned protocol, and the datapath from the user interface is 8-bytes aligned. For GTX and GTH transceivers, the core configures the transmit path as eight bytes and the receive path as four bytes.
The CB/CC logic is internal to the core, which is primarily based on the received recovered clock from the serial transceiver. The BUFG usage is constant for any core configuration and does not increase with any core feature. In the GTY transceiver, the core configures both transmit and receive path as eight bytes.