Register Pipeline Type
This property allows for the trade-off between performance and area efficiency.
Default : A two-deep registered mode (supports back-to-back transfers) that balances performance with low input fanout, as used in the AXI4-Stream Switch.
Fully-registered : Similar to Default (supports back-to-back transfers), except all payload and handshake outputs are driven directly from registers.
Light-weight : Inserts one bubble cycle after each transfer.
SLR Crossing : Adds extra pipeline stages to optimally cross one super logic region (SLR) boundary in stacked silicon interconnect (SSI) devices. All SLR crossings are flop-to-flop with fanout=1. See Floor Planning Constraints for AXI4-Stream Register Slice SLR Crossing Modes for floorplanning guidance.
SLR TDM Crossing : Similar to SLR Crossing, except it consumes half number of payload wires across the SLR boundary and propagates the cross-SLR signals at twice the frequency of the AXI interfaces.
Bypass : Directly connects the slave interface to the master interface.
Bypass-Endpoint : Similar to Bypass, except for allowing interface properties to be treated as fixed values during IP integrator design validation.
Multi SLR Crossing : Supports spanning zero or more SLR boundaries using a single Register Slice instance. Also inserts additional pipeline stages within each SLR to help meet timing goals.
Preserve MI : It puts dummy logic on all the MI pins, so none of the pins are trimmed during synthesis, thus creating a dummy (non-functional) AXI endpoint master. The SI pins are left unconnected.
Preserve SI : It puts dummy logic on all the SI pins so none of the pins are trimmed during synthesis, thus creating a dummy (non-functional) AXI endpoint master. The MI pins are left unconnected.
Auto-Pipelined : Place and route tool automatically insert SLR crossing flops and the intermediate pipeline flops on nets marked with autopipeline attributes to satisfy the system timing constraints. When this feature is enabled, a special physical synthesis phase inserts and places the additional pipeline stages, based on setup timing slack and SLR distance.
Number of SLR Crossings : When using Multi SLR Crossing mode, select the number of SLR boundaries to be crossed within the core.
Pipeline Stages within Master-side SLR : When using Multi SLR Crossing mode, select the number of additional pipeline stages to insert within the master-side SLR (between the SLR boundary and the SI interface).
Pipeline Stages within Slave-side SLR : Select the number of additional pipeline stages to insert within the slave-side SLR (between the SLR boundary and the MI interface).
Pipeline Stages within Middle SLR : Select the number of additional pipeline stages to insert within each middle SLR (between the two SLR boundaries). Enabled only when Number of SLR Crossings is >1.