Each core is designed to meet the maximum target frequency of 250 MHz on an AMD Kintex™ 7 FPGA (xc7k325tffg900-1.) It can be expected that an -2 speed grade part can achieve 5% higher maximum target frequency and that a -3 speed grade part can achieve 10% higher maximum target frequency. For AXI4-Stream Switch configurations with more than approximately four masters or slaves, the target maximum frequency can be reduced by 20-25%.