When using Vivado IP integrator, the Vivado IDE automatically computes the values of these parameters.
TDATA width (bytes)
This parameter specifies the width in bytes of the TDATA signal on all the AXI4-Stream interfaces. This parameter is an integer and can vary from 0 to 512. Set to 0 to omit the TDATA signal. If the TDATA signal is omitted, then the TKEEP and TSTRB signals are also omitted. The width of the port is multiplied by 8 to get the width in bits.
Enable TSTRB
If set to Yes , this parameters specifies if the optional TSTRB signal is present on all the AXI4-Stream interfaces. This option can only be enabled if the TDATA Width (bytes) parameter is greater than 0.
Enable TKEEP
If set to Yes , this parameters specifies if the optional TKEEP signal is present on all the AXI4-Stream interfaces. This option can only be enabled if the TDATA Width (bytes) parameter is greater than 0.
Enable TLAST
If set to Yes , this parameters specifies if the optional TLAST signal is present on all the AXI4-Stream interfaces.
TID width (bits)
If greater than 0, this parameter specifies if the optional TID signal is present on all the AXI4-Stream interfaces. A value of 0 omits this signal. Values 1 and 32 sets the width of this signal accordingly.
TDEST width (bits)
If greater than 0, this parameter specifies if the optional TDEST signal is present on all the AXI4-Stream interfaces. A value of 0 omits this signal. Values 1 and 32 sets the width of this signal accordingly.
TUSER Width (bits)
If greater than 0, this parameter specifies if the optional TUSER signal is present on all the AXI4-Stream interfaces. A value of 0 omits this signal. Values 1 and 32 sets the width of this signal accordingly.