The AXI Protocol Checker is used to debug interface signals in systems using AXI4, AXI3, or AXI4-Lite protocols by monitoring traffic between the AXI Master and AXI Slave Cores.
The interface is checked against the rules outlined in the AXI Specification to determine if violations occur. Violations are reported in a simulation log file message, and as a debug net in the Vivado Logic Analyzer. In addition, the violations appear on the status vector output port from the core.
Figure 1. AXI Protocol Checker Block Diagram
