Interface - 8.2 English

PG103 Video Test Pattern Generator

Document ID
PG103
Release Date
2022-05-11
Version
8.2 English

The Xilinx ® Video Test Pattern Generator (TPG) core is easily configured to meet your specific needs through the Vivado Design Suite. This section provides a quick reference to parameters that can be configured at generation time.

Figure 4-1: Customize IP Screen

X-Ref Target - Figure 4-1

tpg1.png

The screen displays a representation of the IP symbol on the left side, and the parameter assignments on the right side, which are described as follows:

Component Name: The component name is used as the base name of output files generated for the module. Names must begin with a letter and must be composed from characters: a to z, 0 to 9 and “_”.

Samples Per Clock : Specifies the number of pixel processed per clock cycle. Permitted values are 1, 2, 4, and 8 samples per clock. This parameter determines IP's throughput. The more samples per clock, the larger throughput it provides. The larger throughput always needs more hardware resources.

Maximum Data Width : Specifies the bits per component of input samples when the core is in pass-through mode and defines the size (bits per component) of the generated stream when in generator mode. Permitted values are 8, 10, 12, and 16 bits. This parameter should match the Video Component Width of the video IP core connected to the master and slave AXI4-Stream video interfaces. This value is static and is not configurable during runtime.

Maximum Number of Columns : Specifies maximum video columns/pixels the IP core could produce at runtime. Any video width that is less than Maximum Number of Columns can be programmed through AXI4-Lite control interface without regenerating core.

Maximum Number of Rows : Specifies maximum video rows/lines the IP core could produce at runtime. Any video height that is less than Maximum Number of Rows can be programmed through AXI4-Lite control interface without regenerating core.

Enable AXI4-Stream Slave interface : When checked, the core can feed the video input stream through. When unchecked, the core can operate without a video input stream producing only the test patterns that the TPG can generate.

Solid Color : Specifies whether to enable solid color patterns. Check the box when solid color patterns are desired during runtime; otherwise uncheck the box to save resources and improve timing performance. The solid color category contains solid red (0x04), solid green (0x05), solid blue (0x06), solid black (0x07), and solid white (0x08) described under Background Pattern ID register in Product Specification .

Ramp Pattern : Specifies whether to enable ramp patterns. Check the box when ramp pattern are desired during runtime; otherwise uncheck the box to save resources and improve timing performance. This category contains horizontal ramp (0x1), vertical ramp (0x2), temporal ramp (0x3), and combined vertical and horizontal ramp (0xE).

Color Bar : Specifies whether to enable color bar patterns. Check the box when color bar patterns are desired during runtime; otherwise uncheck the box to save resources and improve timing performance. This category has color bars (0x9), Tartan color bars (0xB), cross hatch (0xC), and black and white checker board (0xF).

DisplayPort : Specifies whether to enable DisplayPort patterns. Check the box when DisplayPort patterns are desired during runtime; otherwise uncheck the box to save resources and improve timing performance. The DisplayPort color ramp (0x11), Displayport black and white vertical lines (0x12) and DisplayPort color square (0x13) are among this category.

Color Sweep : Specifies whether to enable color sweep pattern. Check the box when color sweep pattern is desired during runtime; otherwise uncheck the box to save resources and improve timing performance. Color sweep (0xD) is the only pattern is this category.

Zone Plate : Specifies whether to enable zone plate pattern. Check the box when zone plate pattern is desired during runtime; otherwise uncheck the box to save resources and improve timing performance. Zone Plate (0xA) is the only pattern is this category.

Foreground Patterns : Specifies whether to enable foreground patterns. Check the box when foreground patterns are desired during runtime; otherwise uncheck the box to save resources and improve timing performance.