In a typical system with one
processor, as shown in the following figures, the instruction and data cache interfaces
M_AXI_DC) are connected to dedicated
AXI4 interfaces optimized for MicroBlaze on the System Cache core. The System Cache
core often makes it possible to reduce the MicroBlaze internal cache sizes without reducing system performance. Non-MicroBlaze
AXI4 interface masters are connected to one or more
of the generic AXI4 slave interfaces of the System
Cache core either through an AXI4 interconnect or
directly as shown in the following figures.
The System Cache core has 16 cache interfaces optimized for MicroBlaze, enabling direct connection of up to eight MicroBlaze processors, as shown in the following figure.