The atomic operations are divided into four groups: AtomicStore, AtomicLoad, AtomicSwap and AtomicCompare. All atomic transactions except AtomicStore use both the AXI AW and AR channels.
There are a number of general rules that must be followed:
- Atomic operations that use both channels must have the same setting on both channels
- Multiple simultaneous operations must be issued in the same order on both channels
Operation 0 is used for normal operation, while the remainder are used for various Atomic operations.
The operations are defined in the following table.
|00||Normal||Normal transaction with translation hints in Sub-Op and Structure bit fields|
|01||AtomicStore||Operation has AtomicStore category with Sub-Op defining exactly how the data is handled. Structure bit defines Endianness.|
|10||AtomicLoad||Operation has AtomicLoad category with Sub-Op defining exactly how the data is handled. Structure bit defines Endianness.|
|11||AtomicSwap||Operation has AtomicSwap category, and the distinction from AtomicCompare is defined by Sub-Op|
|11||AtomicCompare||Operation has AtomicCompare category, and the distinction from AtomicSwap is defined by Sub-Op|
If cache line is allocated when not expected the SnpMe attribute of the Atomics operation will be set.
AtomicLoad and AtomicStore both have the same set of eight sub-operations, with the only difference that AtomicLoad returns the value prior to the atomic operation.
|010||EOR||Bitwise Exclusive OR|
The Sub-Op Add, SMax, SMin, UMax and UMin also use the structure bit to define Endianness.
AtomicSwap and AtomicCompare both have the same Op value but use different Sub-Op values
The Endianness bit selects how the individual bytes are handled in arithmetic operations:
The coherency protocol imposes a number of rules on the length of the atomic operations.
|AtomicStore||1, 2, 4, or 8 bytes|
|AtomicLoad||1, 2, 4, or 8 bytes|
|AtomicSwap||1, 2, 4, or 8 bytes|
|AtomicCompare||2, 4, 8, 16, or 32 bytes. Returned value is half length.|
AtomicCompare has both a Compare and a Swap value, which makes it twice as large as the others.
There is a lot of flexibility in creating the atomic operations from AXI, although some rules must be followed:
- AtomicLoad, AtomicStore, and AtomicSwap
- Incr and Wrap can be used to build the transaction, with
the total length of the operation determined by AxSIZE (number of beats)
* AxLEN (beat size):
- Incr must be aligned to the total length
- Wrap must be aligned to AxSIZE (be aware that the data used for the operation is the unwrapped data)
- Both AR and AW must have the same settings, excluding AtomicStore which lacks the AR phase
- Incr and Wrap can be used to build the transaction, with the total length of the operation determined by AxSIZE (number of beats) * AxLEN (beat size):
- AtomicCompare (CAS)
- Incr and Wrap can be used, with the total length of the
operation determined by AxSIZE (number of beats) * AxLEN (beat size):
- AR must have half the length of AW
- Incr must be aligned to the total length of AW
- Wrap must be aligned to the total length of AR
- Both AR and AW must use the same address
- Incr and Wrap can be used, with the total length of the operation determined by AxSIZE (number of beats) * AxLEN (beat size):
A common method for AtomicCompare is to use a Wrap transaction with the same size (AxSIZE) on both AR and AW, and just use half the length (ARLEN) for AR.